SysML and Lego sorting machine

Posted on August 11th, 2010 by Loïc Fejoz

Looking at the following YouTube’s video about a sorting machine made in Lego™ gave me the idea of a subject for an ESIAL industrial project. A way to enhance our SysML Companion is to add temporal verification. This will be done by the three or four students chosen for the project by adding a connector to Uppaal – Uppaal being a model-checker of real-time system specification (under the form of timed automata).

I would like them to build a slightly more complicated machine than the one on the video. The speed of the conveyor will not be constant. Instead it should vary depending on the alternation of the brick’s color. This small change adds some (temporal and architectural) constraints that should be interesting to specify and verify. Moreover I would like them to work on three important aspects of system building: verification, animation and deployment. So they will also build the real machine with Lego™ Mindstorm, program it with Urbi and write an animator (target not yet specified but maybe pygame?). More details are available in the ESIAL industrial project form.

The students will mainly:

  1. specify the sorting machine in SysML/MARTE,
  2. specify and develop the connector to Uppaal,
  3. specify and develop a generator of Urbi code,
  4. build the machine.

Please stay tuned – results of the project will be posted on this blog as they are achieved.



fiche proposition projet industriel 2010-11 SysML (19)

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(Min,+) algebra interpreter available for research and teaching

Posted on July 27th, 2010 by admin

The (min,+) algebra is the formalism underlying the Network Calculus theory which allows to compute upper bounds on end-to-end delays in large scale real-time systems that cannot be analyzed with classical scheduling techniques. For instance, NC has been used for about ten years to dimension and certify avionic AFDX networks on which possibly several thousand streams of data are exchanged.

If Network Calculus is a powerful tool, it requires some effort to be learned and experimenting with a (min,plus) algebra comes in handy in that regard. We are glad to make freely available for academic research and teaching the Minplus-console which allows to perform (Min,+) algebra operations for the classes of function that are of main interest in Network Calculus, namely increasing convex/concave and ultimately pseudo-periodic functions.

The Minplus-Console is developed by RTaW as part of the French ANR project PEGASE. The other partners that make up the consortium are Thales Research and Technologies, Thales Alenia Space, Thales Avionics, ONERA, ENS Cachan, LIP Laboratoire de l’Informatique du Parallélisme and INRIA Rhône-Alpes. A detailed description of the project and its targeted outcomes is provided in this paper.





  • License: free for academic use: research and teaching. Commercial use of Minplus-console is not allowed.
  • Platforms: available for all editions of Windows (32 and 64 bits) and for Linux (32 and 64 bits).
  • User manual: provided as pdf along with the software.
  • Installation and release notes: see this post on RTaW forum.
  • Free support: through RTaW forum.

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End of SysML Quizz contest

Posted on July 19th, 2010 by Loïc Fejoz

Thanks to all participants of the SysML Quizz contest. The level was very good! All winners will receive an email explaining how to get their t-shirt.

The quizz will still be available online. Even better, the SysML meta-model quizz is available under a Creative Commons Attribution-Share Alike 2.0 License. Now all students and practitioners can challenge their SysML knowledge against it!.

The quizz can be downloaded on a wiki page of the QuizzTools project. QuizzTools is a set of tools to create and conduct quizz . It is mainly an Eclipse Editor, GIFT importer/exporter and HTML exporter. QuizzTools has been released by RTaW under the Eclipse Public License.

Tags: Eclipse, sysml // 1 Comment »

RTaW-Sim available for free! fully-functional and time-unlimited

Posted on June 26th, 2010 by admin

RTaW-Sim is a Controller Area Network simulator with fault-injection capabilities. As of now, it is available at no cost for all use – including commercial, research and training.





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RTaW joins the Scilab consortium

Posted on June 26th, 2010 by admin

RTaW is pleased and excited to join the SCILAB Consortium that develops SCILAB, the free platform for Numerical Computation – RTaW is extending its virtual prototyping tool SysML-Companion to support Scilab/Xcos as a target simulation language. In addition, RTaW undertakes the development of formal verification tools for Scilab/Xcos models in order to provide an end-to-end design flow dedicated to systems with safety requirements.



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SysML Metamodel Quizz and 15 T-Shirts to win!

Posted on June 8th, 2010 by Loïc Fejoz

Test your knowledge about the SysML specification with our quizz. It may be especially useful for people willing to pass the advanced SysML Certification.

RTaW offers running T-Shirts to the best 15 participants of our SysML quizz (end date: 15th of July). Please go ahead with the quizz (40 questions), you will be asked to provide an email if you wish to participate in our contest. Answers to the questions are provided at the end. Good luck!

EDIT : The contest is now closed but you still can pass the quizz.

Quizz

Where should a stereotype keyword appear in a comment box?




Where should stereotype properties appear in a comment note box?




Which of the following are valid SysML dependency?




Which objects could be linked by a conform relationship?





Which metaclass is extended by the stereotype View?




Of which metaclass is Viewpoint an instance of?





Can a user define his own block compartments?



How can a constraint be drawn that is owned by a block?



Can a namespace compartment contain graphical elements?



Unit is a





A ValueType is a




What is mandatory for any classifier which specializes a ValueType?



What makes a FlowPort non-atomic?







What is the meaning of the isBehavior attribute (inherited from UML Port)?



For an atomic FlowPort, what is the value of the isConjugated attribute?




If a flow port is connected to multiple external and/or internal connectors, what happens to an item coming over?





How are flow properties on the ports bound to behaviour parameters and/or block properties?




Can a FlowSpecification own operations and receptions?



Can a FlowSpecification have an ownedAttribute that is not a FlowProperty?



What can ItemFlow be typed with?





When there is a composition association between activities, which value is mandatory for the lower multiplicity at the part end?




If the part end invokes a non-re-entrant behaviour, which value is mandatory for the upper multiplicity at the part end?




In the context of an association between an activity and an object node, which value is mandatory for the lower multiplicity at the object node type end?





In the context of an association between an activity and an object node, which value is mandatory for the upper multiplicity at the object node type end?





Of which metaclass is Rate a stereotype of?






How are the Continuous and Discrete stereotypes defined?




Of which metaclass is Probability a stereotype of?






What does the ControlOperator stereotype mean?



What is mandatory for an activity stereotyped by ControlOperator?




Can an activity have a parameter typed by ControlValue and not be stereotyped by ControlOperator?



Can the stereotypes Discrete and Continuous be applied at the same time to the same element?



For object nodes that are target of continuous flows (such as electrical signals), which of the following propositions would you do?




Which of the following literals belong to the ControlValue enumeration?





Of which metaclass Allocate is a stereotype of?







Which metaclasses can be Allocated?






Allocation is a binary relationship.



Of which metaclass is Requirement a stereotype of?




Of which metaclass TestCase is a stereotype of?







Which type must the return parameter of a test case have?





Which of the following are standard trace relationships concerning Requirement?









Tags: sysml // 3 Comments »

Software name changes at RTaW

Posted on May 7th, 2010 by admin

NETCAR-Sim becomes RTaW-Sim and NETCAR-ECU will now be known as RTaW-ECU. These name changes simply reflect the fact that these tools are not specific to the automotive field (as the prefix NETCAR implied) but they can be useful in the design of any real-time systems, be it in the automation field, in the avionics, for railway systems, etc

There will be some further announcement about our new licensing scheme later this month – please stay tuned ;)

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RTS’2010 : Virtual prototyping from SysML and Virtualization in Embedded Systems

Posted on April 20th, 2010 by Loïc Fejoz

Here are the slides of a talk given at RTS Embedded Systems 2010 about virtual prototyping from SysML.

Prototypage virtuel à partir de SysML


Thank you to co-author David Guihal from ALYOTECH Innovation, Toulouse. RTaW gave another presentation at RTS’2010 on the use of virtualization in automotive embedded systems: technologies, main use-cases, expected benefits and some pitfalls. Here are the slides:
Virtualization in Automotive Embedded Systems : an Outlook


Thank you to our co-authors Bertrand Delord (PSA Peugeot-Citroën, Vélizy) and Markus Baumeister (Freescale semiconductor, Munich).

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Minimal requirements for a custom EMF model implementation

Posted on January 28th, 2010 by Loïc Fejoz

Few months ago, I was playing with EMF models under Eclipse. It turns out that writing an EMF implementation without reusing EMF library is not an easy task. I even submit one bug ( #295581). I thought EMF Editors were assuming too much about EMF values’ types.

For instance, the reflexive interface, i.e. using eGet, on multi-instance references must return an EList! Don’t ask me why I found in the code it could be relaxed… Anyway, Dave Steinberg suggests to write a guide for custom EMF implementation. I have not written one but I can provide you some unit-tests!

While writing my own EMF implementation, I carefully wrote some generic unittests for EMF custom implementation. You can download and use them freely under BSD/X11 like license.

One more thing, a custom model that pass those tests can be opened by the reflexive EMF editor, but you may have some errors if there is no property “name”. It should be nice for the editor to look at a property that is tagged as an id instead…

Ecore implementation guide unittests (154)

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Offre de stage : Intégration de Scilab/Xcos avec la suite SysML-Companion

Posted on January 19th, 2010 by Loïc Fejoz

Description du poste

RTaW recrute un stagiaire pour une durée de 4 à 6 mois.

Dans le cadre du développement de l’outil SysML-Companion, vous aurez à développer des passerelles entre les formalismes SysML/MARTE et Scilab/Xcos. Ces passerelles seront implémentées sous forme de greffons à Topcased(Eclipse).

Tâches

Le stagiaire devra :

  • identifier les pré-requis et la faisabilité d’une passerelle entre SysML et Scilab/Xcos,
  • documenter les relations entre les formalismes pré-cités,
  • développer des plugins Topcased implémentant une des passerelles identifiées,
  • spécifier des exemples utilisant la passerelle créée.

Vos compétences

Vous êtes en dernière année d’école d’ingénieur.

Vous avez des connaissances en:

  • développement logiciel notamment en Java
  • UML
  • SysML est un plus,
  • Scilab/XCos est un plus,
  • Eclipse est un plus (notamment Acceleo MTL, ATL, QVT)
  • Tom est un plus.

Contact

Envoyez CV et lettre de motivation à info@realtimeatwork.com.

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