How RTaW-Pegase will help you design of safe and optimized networks?

  • Support your design choices by evidence — RTaW-Pegase computes performance metrics such as networks loads, communication delays and buffers utilization that make it possible to predict network performances in all use-cases. In addition, RTaW-Pegase offers features to investigate specific scenarios and compare the impact of different design and configuration options.

  • Reduce time-to-market — our unique ZeroConfig-TSNⒸ (ZCT) generative design algorithm cut the development time of TSN networks by a factor 30 and more. Interested to see ZCT at work? Contact the product manager for a demo.
  • Cost-optimize your networks — RTaW-Pegase enables you to avoid over-provisioning of resources (link speeds, memory in switches, unneeded technologies, etc). In addition, RTaW-Pegase includes design space exploration algorithms to optimize network topologies (e.g., number and location of switches), data streams routing and allocation of the software functions on the stations.
  • Design for the future — you can know in advance the extent to which your networks will be able to support additional traffic thanks to our unique Topology Stress TestⒸ (TST) feature. Interested to discover how TST can help you? Contact the product manager for a demo.
  • Results you can trust — RTaW-Pegase relies on Network Calculus that is accepted in aeronautics certification, its core algorithms are described in a formal manner in refereed scientific publications – see the technical papers co-authored with our partners.
  • Proven in use — leading companies from the automotive, aerospace and industrial domains have been relying on RTaW-Pegase for their business since 2009 – see the companies that trust us.

Key Features

  • Support industrial Ethernet, automotive switched Ethernet (incl. 802.1Q, AVB Credit-Based Shaper, TSN Time-Aware Shaper, frame preemption, 802.1CB, Some/Ip SD, DoIp, AVTP), time-triggered Ethernet (incl. SAE AS6802) as well as AFDX (ARINC664) with arbitrary speeds and topologies,

  • Support worst-case analysis and timing-accurate simulation of heterogeneous communication architectures made up of CAN (2.0A, 2.0B, CAN FD and ARINC825), switched Ethernet, AFDX, FlexRay, LIN and ARINC429 buses interconnected through gateways,

  • Generative Design with ZeroConfig-TSN (ZCT)Ⓒ a “push-button” approach to automate the selection and configuration of TSN networks,

  • New: Topology Stress Test (TST)Ⓒ design-space exploration algorithm helps designers make early-stage topological and technological choices without full knowledge of communication requirements,
  • Higher-level communication layers, run-time environments and applications can be modelled with user-written Java plug-ins. This allows the simulation of complete embedded systems,

  • Optimized TSN Time-Aware Shaper (IEEE 802.11Qbv) transmission schedules for interconnected networks,
  • Support Network-on-Chip for Kalray MPPA and STMicroelectronics manycore architectures,
  • Analysis and configuration of task scheduling, Event-Triggered and Time-Triggered scheduling, independent tasks, tasks described as graphs and runnables, verification of system-wide timing chains across tasks, networks and CPUs,
  • Implement the state of the art of Network Calculus to compute upper bounds on communication latencies, frame jitters and buffers utilization,
  • Offer both worst-case analysis and timing-accurate simulation with a parallelized simulation engine to predict worst-case and typical performances,
  • Support FIFO, priority, AVB credit-based shaper, TSN time-aware shaper, frame preemption, TTEthernet and round-robin frame schedulers,
  • Include optimized priority allocation and routing algorithms, and configuration algorithms for AVB credit-based shaper and TSN time-aware shaper,
  • Support periodic and sporadic message transmission patterns, UDP and TCP transmissions, segmented messages (e.g., video streams and FTP traffic), and complex transmission patterns (e.g., DoIp protocol),
  • Rich graphical edition and visualization environment with communication architecture editor, Gantt diagrams, and comparison of design options,
  • Easy import and export of network configurations and simulation results through Java export plug-ins, CSV, XML files and the common formats used in the industry,
  • Maximum pessimism of the computed communication latencies with regard to the true worst-case latencies is limited (typically less than 15%) and is evaluated for each data stream,
  • Include NETAIRBENCH, a benchmark generator to create random yet realistic Ethernet configurations for early stage evaluation or to study how the network will be able to accomodate more load in future evolutions,
  • Extremely fast – for instance, large AFDX networks in civil airplanes are analysed in less than 10 seconds,
  • Runs on all 32 or 64 bit platforms supporting Java – no dongle or license server protection,
  • Professional support and custom extensions available. RTaW-Pegase functionalities are also available through software developers SDK for use in your own programs.

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